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1 week ago

HW Memory & Standard Cell Layout

Zilogic Systems
2 to 6 Yrs
  • Regular
  • Job Details

Job Details

    Job Description:- 2-5 years of experience in Custom layout, Std cell and Memory Layout design. Memory Leafcell layout library design from scratch including top level integration. Good knowledge on different types of memory architectures. Good knowledge in optimized layout design for better performance. Sound knowledge & hands on experience in Finfet technology, layout design and DRC limitations. Proficient in physical verification flow & debug, like DRC, LVS, ERC, Boundary conditions. Proficient in Cadence Virtuoso layout editor and Calibre physical verification flow,

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  • Zilogic Systems
  • Other Karnataka
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Zilogic Systems

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Regular
1 week ago

HW Memory & Standard Cell Layout

Zilogic Systems
Other Karnataka
2 to 6 Yrs
+11
Layout design, Cadence Virtuoso layout editor, Custom layout, Std cell design, Memory Layout design, Memory Leafcell layout library design, Memory architectures, Finfet technology, DRC limitations, Physical verification flow, Calibre physical verification flow
Not Interested
Regular
2 weeks ago

Standard Cell Layout Engineers

BITSILICA
Other Karnataka
3 to 7 Yrs
+27
standard cell layout, analog, Electromigration, crosstalk, matching, shielding, mixedsignal, custom digital block designs, CMOS process, layout area optimization, routing optimization, design rules, yield , reliability issues, Latchup, coupling, IRdrop, parasitic analysis, schematics, Cadence tools, Virtuoso schematic editor, Virtuoso layout, Mentor Caliber, Device Matching, Parasitic Analysis, Electron Migration, Isolation Techniques
Not Interested
Regular
1 month ago

Senior Standard Cell/ Analog/ IO Cell Design/Simulation ...

Synopsys Inc
Other Karnataka
6 to 15 Yrs
+10
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6 days ago

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MBSK & Co.
Delhi
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0 days ago

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